Tag Archives: H3

RIFF JTAG – JTAG Manager v1.33, RIFF Box firmware v1.25 released

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RIFF Box Firmware 1.25
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  • Added 5.0V USB Power On/Off controlling feature
  • Changed sequence for 32-bit write accesses for ARM11 core (MSM8xxx support)

JTAG Manager 1.33
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  • Improved connection policy:
  • Resurrection/DCC connection to device is implemented in such way that JTAG speed changes have 2 stages – booting stage and working stage.
    Booting stage is the one from the connection start and until the DCC Loader upload is complete. Booting TCK/RTCK speed are setup by JTAG Manager no matter what are the TCK settings by user (JTAG TCK Speed field in the JTAG Manager). Booting speed is hardcoded in the DLL.
    After “booting” stage is complete, the “working” speed is set – the one which is selected by user in the JTAG TCK Speed field.
    If Booting Speed in resurrector DLL is hardcoded as ‘RTCK’ the JTAG Manager would always use RTCK mode during booting stage.
  • Now policy is changed that is when user selects a fixed TCK frequency the JTAG Manager will automatically change booting speed to the fixed TCK too.
  • Fixed bug: if “Use End Address” and “AutoFull Flash Size” were checked there was error setting valid length to read.
  • For Advanced Users: advanced settings are now moved from the DCC Read/Write page (“Notifications…”) into separate button on Box Service page (Advanced Settings button)
  • Added 5.0V USB Power On/Off controlling feature
  • For this go to Box Service page, click Advanced Settings: the Notifications dialog will be displayed, go to “Advanced Settings” page and set desired mode for “Enable 5.0V output” checkbox.
  • When enabled, 5.0V power will be on after any “JTAG” operation executed and will remain “ON” until box restart or until “Enable 5.0V output” checkbox is unchecked and any “JTAG” operation is executed.
  • Added optimization for flashing memory devices which are sector-based (like MDOC H3 or MMC/SD memory cards) if error code 0x3C (write-protect) is received no recover attempts are made.

RIFF JTAG – RIFF JTAG Manager v1.28, RIFF Box firmware v1.20 released

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14.03.2011  RIFF JTAG Manager v1.28, RIFF Box firmware v1.20 released

Whats new :

Firmware 1.20

  • Optimised connection to the PXA270 core
  • Added DCC TX channel (host-to-debugger) cleanup (flushing) feature (happens now during DCC Read with 0 timeout parameter) for Cortex-A8
  • Optimized Cortex-A8 connection establishment after coming out of reset (after NRST signal assertion)
  • Added emergency script processing for Cortex-A8 core (h/w script which is executed immediately after core was halted)

JTAG Manager 1.28

  • Added RAM selft-test right before uploading DCC loader.
  • Added functionality to handle complex memory devices (like MDOC H3) with lengths not necessary to be alighned to MBs;
  • Added DCC TX channel flushing command before starting DCC Loader – thus it is guaranteed that next first DCC read will get DCC Loader’s packet and not some residual trash data.
  • Added 1GB and 2GB OneNAND chips to the size autodetection list.
  • Added progress indication during saving files which were read on the DCC Read/Write page

Please click “Check For Updates” button in order to download and apply new files. Closing all running application before starting update process is recommended.